How can a CPU access more memory locations than 2^wordsize?

I noticed that CPU's like the 8086 and especially the 8080 have the ability to access more memory than what one would normally assume. The 8080, for example, has an 8-bit word size but can use a 16-bit memory address. From what I understand, a standard instruction has the opcode in the beginning and then the address on which it will work. How then, could a 8-bit processor be able to fit an opcode and 16-bit address in 8-bits?

The 8080, as @TEMLIB pointed out, had 16 bit registers (the program counter, the stack pointer and BC, DE, and HL), and could access 216 bytes of memory. The 8080 had an 8-bit bus, and for instructions that required 2 bytes of data or address the bus would be used for 2 cycles.

The 8086 is more interesting. The 8086 had 16 bit registers, but could access 220 bytes of memory. It did this by using segment registers. There were four special 16-bit registers, CS, DS, ES and SS and every address was calculated by taking 16 times the appropriate segment register plus the 16-bit offset coming from a "normal" register. So for example, instruction addresses were all calculated as an offset from CS 16, and stack references were all calculated as an offset from SS 16.

Modern 32-bit processors can also sometimes access more than 232 bytes of DRAM through the virtual memory system. Each running program can access only 232 bytes of virtual memory but the page table entries map to (for example) 36 bit physical addresses, allowing the operating system to run multiple programs simultaneously that collectively can access up to 236 bytes of physical DRAM.

StackExchange Computer Science Q#38138, answer score: 8