Algorithms for logical synthesis of multiple output bits?

Karnaugh maps and the Quine–McCluskey algorithm can be good choices for coming up with fairly minimal logical expressions that match the requirements of a truth table.

What if I have a situation where I have $M$ input bits and $N$ output bits though?

A naive way to deal with it would be to solve each output bit independently and come up with $N$ logical expressions. The problem with that is that in circuitry or in CPU implementations, you can do multibit operations which can potentially handle a more optimal logical expression which takes into account several, if not all, of the bits at once.

Are there any algorithms to come up with a fairly minimal logical expression when you have $M$ input bits mapping to $N$ output bits?

as you realize, while universal, Quine-Mcclusky is only a "bitwise" construction method (single bit output) that does not recognize/ exploit common subpatterns for multibit outputs. multibit function construction optimization is a very broad area handled by EE type papers/ applications/ algorithms, there are very many published. the general topic is "logic synthesis". there is also a very broad array of software built for this purpose both commercial and public domain. here is an example of a relatively recent survey of algorithms and also a technique of using known/ previously computed circuits in a library-like context. this paper is useful here in that it refs many of the top systems in use and gives a consolodated view that you seem to be asking for in particular.

• Lazy Man’s Logic Synthesis / Yang, Wang, Mishchenko

StackExchange Computer Science Q#50987, answer score: 4